1. Field of the Invention
The present invention relates to power electronics, especially to an apparatus and a method for precise valley detection in quasi-resonant (QR) flyback converters.
2. Description of Prior Art
Flyback converters are extensively employed in low-power conversion applications due to the advantages of low cost and simple architecture. More specifically, quasi-resonant (QR) flyback converters can enhance the system performance without increasing system complexity and elements used. Therefore, QR flyback converters are advantageous in economic and environmental aspects.
FIG. 1 shows a schematic view of a prior art QR flyback converter. FIG. 2 shows the signal waveforms relevant to the operation of the QR flyback converter in FIG. 1. After energy is fully discharged from the secondary winding Ns, a resonant is established by a resonant tank consisting of the magnetizing inductor of the primary winding Np and the parasitic capacitor of the switching device Q in FIG. 1. With reference to FIG. 2, the switching loss of the QR flyback converter can be reduced if the switching device Q is turned on during the valley voltage across the switching device Q. Namely, the switching device Q is turned on by a gate voltage VG after a delay time Td is elapsed from the moment the parasitic capacitor of the switching device Q starts to discharge (the onset of the resonant). However, the mass-produced QR flyback converters have difficulty to achieve soft switching at valley voltage of the switching device; therefore, the efficiency of the mass-produced QR flyback converters cannot be guaranteed.
To solve above-mentioned problem, U.S. Pat. No. 5,986,897 discloses a QR flyback converter turning on the switching device at a valley voltage across the switching device. FIG. 3 shows a circuit arrangement for valley voltage detection in U.S. Pat. No. 5,986,897. The circuit arrangement can be employed in the QR flyback converter shown in FIG. 1; therefore, the description thereof will be made with reference also to FIG. 1. In the circuit arrangement of FIG. 3, VAUX is a stable positive voltage source for maintaining operation of the circuit arrangement. When the secondary winding Ns starts to discharge, a voltage signal VAUXIN of an auxiliary winding (not shown) is a positive voltage proportional to the resonant waveform (the resonant waveform is shown, for example, by the curve of the drain voltage VD in FIG. 1). With reference to FIG. 3, an electric current flows from VAUXIN to node DMAG and then flows to the transistor M3; moreover, the transistor T1 is turned off at this moment. When the energy of the secondary winding Ns is fully discharged, the drain voltage VD of the switching device Q starts to resonate. At this time, an electric current proportional to the resonant waveform flows from the node DMAG to VAUXIN, a mirrored current flows through the transistor M2, which forms a current mirror with the transistor M1. An inverse signal VM is generated at the serial circuit of the transistor M2 and the resistor R, and the inverse signal VM is inversely proportional to the resonant waveform. The inverse signal VM is at its peak value (maximal value) when the drain voltage VD of the switching device Q resonates to a valley value (minimal value). The inverse signal VM triggers the logic circuit 74 to turn on the switching device Q. The circuit arrangement disclosed by this patent triggers the logic circuit 74 at the peak of the inverse signal VM (corresponding to the valley of the voltage VAUXIN at the auxiliary winding), and then the logic circuit 74 controls the switching of the switching device Q. However, there is a propagation delay between the triggering time and the switching time. Therefore, switching device Q cannot be precisely switched at the resonant valley.
Moreover, U.S. Pat. No. 7,394,670 discloses a valley detection circuit. FIG. 4 shows the bottom voltage detector 51 disclosed in this patent. The bottom voltage detector 51 can be employed in the QR flyback converter shown in FIG. 1; therefore, the description thereof will be made with reference also to FIG. 1. The drain voltage VD of the switching device Q shown in FIG. 1 starts to resonate when the energy in the secondary winding Ns is fully discharged. The auxiliary winding 2C also has similar waveform with that of the primary winding (not shown). When the drain voltage VD starts to resonate, the diode 52 is turned off. At this time, the voltage at negative input of the comparator 57 is RC discharged through the capacitor 55 and the resistor 54. The voltage at negative input of the comparator 57 is compared with a threshold voltage VTH to generate a triggering voltage VBD. The triggering voltage VBD can be used to switch the switching device Q shown in FIG. 1. In this patent, RC discharging constant is used to provide a constant delay time. However, the control circuits of the mass-produced QR flyback converters generally have different propagation delays, and the constant delay time cannot switch all of the mass-produced QR flyback converters at the resonant valley.
Moreover, U.S. Pat. No. 7,426,120 and No. 7,466,569 disclose switching control circuit having a valley voltage detector, and a power converter having phase lock circuit for quasi-resonant soft switching, respectively. FIG. 5 shows the circuit diagram of the phase lock circuit 200 disclosed by these patents. The phase lock circuit 200 can be employed in the QR flyback converter shown in FIG. 1 to determine a programmable delay time; therefore, the description thereof will be made with reference also to FIG. 1. In the phase lock circuit 200, a time delay TDLY is determined by the current source 230 and the capacitor 235, and the time delay TDLY is roughly equal to the delay time Td (from the time drain voltage Vd starts to resonate to the time the resonant valley occurs) shown in FIG. 2. When the time delay TDLY is elapsed and the switching device is to be switched, a slope detection circuit 300 detects the slope of the inverse signal VM at this moment. When the time delay TDLY is excessively long, the slope detection circuit 300 detects a positive slope in the inverse signal VM. The counter 210 controls the current source 230 to have larger current, thus shortening the time delay TDLY for next cycle. On the contrary, when the time delay TDLY is excessively short, the slope detection circuit 300 detects a negative slope. The counter 210 controls the current source 230 to have smaller current, thus prolonging the time delay TDLY for next cycle. Hence, the time delay TDLY will be automatically adjusted to achieve valley switching. However, the adjustment of the time delay TDLY is realized by the current source 230 and the capacitor 235. It is inevitable for the time delay TDLY to have analog error. More particularly, current source 230 with variable and precise current range is difficult to realize. The capacitor 235 and the comparison voltage VY also have manufacture offset. The above-mentioned analog error factors are aggravated for advanced manufacture process, and this makes circuit design more difficult.
Accordingly, the present invention provides a digital dynamic delay modulator and the method thereof for flyback converter to overcome the problems in above-mentioned prior arts.